Wednesday, July 24, 2024

Electronic Design Automation for SDR Devices

Parent Category: 2022 HFE

By Brendon McHugh

With the explosive development of digital and embedded electronics in the last few decades, software-based technologies became the norm for most of the communications and signal processing applications. The scenario wasn’t different for radio systems, as software-defined radios (SDRs) are now at the forefront of high-quality and cutting-edge technologies on wireless communication systems. The application range of SDRs is huge, covering satellite communication systems, unmanned aerial vehicles (UAVs), electronic warfare, radar systems, and 5G radio access networks (RAN). Due to its flexibility and reconfigurable nature, SDRs are an integral part of these technologies, enabling a variety of capabilities that can only be accomplished with software-based techniques. However, as these applications become smarter and more precise, it is important that the engineering aspects of SDRs continue to evolve, ensuring high-performance RF functioning in any required condition.

Furthermore, customizations and upgrades are often required, in both software and hardware aspects of the SDR. Hardware development deals with the radio front-end (RFE), and is performed by designing and manufacturing the printed circuit board (PCB) of the electronic unit. On the other hand, software development is performed at the digital backend, which typically consists of an field programmable gate array (FPGA) with digital signal processing (DSP) capabilities. In both cases, the use of electronic design automation (EDA) tools is paramount to ensure fast prototyping, performance optimization, and error detection before and after manufacturing.

In this article, we discuss how SDRs are developed for a variety of applications. In particular, we will focus on two main EDA tools: the Intel Quartus Prime for FPGA programming, and KiCAD for schematics and PCB design. We will discuss the main aspects of FPGA EDA, including compilation, placement, routing, and integrated logic analyzer debugging, as well as how each step influences the whole design flow. On the PCB side of the design, we will cover the PCB layout, the 3D viewing of the board, and some of the most important KiCAD EDA tools, such as interactive routing, the schematic editor, length tuning, footprint editors, and, last but not least, the design rule checking (DRC).

Basic Breakdown of SDRs

Before we dive into the EDA aspects of SDRs, let’s take a step back and discuss the main aspects of the SDR architecture, and what are the major parameters an engineer must consider in the EDA design process. The general SDR is essentially a radio transceiver, with complex embedded processing capabilities and a flexible/reconfigurable platform to change and adapt radio functions and parameters via software. The SDR general architecture can be divided in two main stages: the radio front-end (RFE) and the digital backend. Auxiliary modules, including a mixed-signals interface, a power manager, and a timer board, are also part of the SDR.

The RFE consists of Rx and Tx channels, each one with a wide tuning frequency range of several gigahertz (the highest SDR in the market is capable of 3 GHz per channel) and several filters, RF amplifiers, and LNAs for signal conditioning. Moreover, multiple-input multiple-output (MIMO) SDRs can operate with several parallel channels in one RFE. On the other hand, the digital backend consists of an FPGA with high-performance DSP capabilities. Complex communication protocols and intelligent algorithms, based on artificial intelligence (AI) and machine-learning (ML), can also be embedded into the FPGA unit.

The digital backend offers a high degree of reconfigurability and programmability, allowing the SDR to be modified, adapted and upgraded without critical hardware modifications. The RFE and FPGA are connected through the mixed-signals interface, composed of dedicated digital-to-analog convertors (DACs) and analog-to-digital convertors (ADCs) and coordinated by the time board.

On the digital backend side, there are several functions that must be programmed into the FGPA for proper radio implementation (Figure 1). The most important ones are the on-board DSP capabilities, optimized for signal modulation/demodulation, up/down converting, CORDIC mixing, data packetization, first-in first-out (FIFO) queue control, and any other filtering or application-specific operations required, including security algorithms and MIMO management protocols.

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Figure 1 •  Block diagram of an FPGA programmed for SDR backends.

The FPGA is also responsible for the connection between the SDR and the host or RF network, providing data packetization over Ethernet links with up to 10 to100 Gbps of transmission rate, via SFP+/qSFP+ fiber links and optical transceivers attached to the SDR. The combination between parallel signal processing, application-specific algorithms, and fast host communication enables the implementation of complete RF modules using standalone commercial off-the-shelf (COTS) SDRs in a variety of applications.

The electronic hardware of an SDR can be implemented in several configurations, depending on the architecture and specifications. High-end modular SDRs, such as the Crimson TNG model from Per Vices, divide the electronic hardware into five PCBs: an Rx board implementing the receive channels of the RFE, a Tx board with the transmit channels of the RFE, a timer board responsible for clock generation and distribution, a power board used to convert, manage and distribute energy for all the other boards, and a digital board containing the digital backend and interfaces for control, configure, and send/receive data from the RFE and the host.

Each board has different requirements in terms of signal integrity, impedance matching, maximum current, grounding, heat dissipation, and electromagnetic interference and compatibility (EMI/EMC). The proper design of each PCB, as well as the integration between each one and the external world, can be greatly facilitated with hardware EDA tools. Figure 2 shows how each board is distributed in the SDR architecture.

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Figure 2 • Block diagram of the boards of an SDR.

Electronic Design Automation (EDA)

As the name suggests, the term EDA comprises any tool, technique, software, hardware, and service that is used to assist the electronics engineer at any step of the design and manufacturing flow; automating laborious tasks and optimizing the overall performance of the electronic design. It can be used for definition, planning, design, implementation, verification, manufacturing, and testing of integrated circuits (IC) and discrete circuits in PCBs. There are several EDA tools in the market, optimized for different tasks. However, their basic functionality always follows the same reasoning: a circuit is modeled at the electronic system level (ESL), with specifications and requirements defined by the designer, application, and manufacturing process.

The EDA tool then automates the processes involved in design, test, and verification, automatically trying different circuit configurations that satisfies the ESL functionalities, performance and signal quality expectations, and manufacturing requirements. The objective of EDA is not to replace the electronics designer, but to simply automate repetitive and burdensome tasks, as well as optimizing electronics parameters that would be impossible to tune otherwise.

There are EDA tools in the market for PCBs, FPGAs, ASICs, and systems-on-chip (SoCs). For PCBs, EDA is fundamental to ensure that the board complies with signal integrity requirements and the manufacturing process, whereas for FPGAs, the EDAs can optimize routing, resource allocation, and error-free operation.

The technological advancements promoted by EDA tools were only possible after the 1960s and the 1970s, with the development of the first automated tools. Before that, circuit designers needed to rely on manual drawing methods on paper to design the circuit and layout the PCB. Some early developments were obtained through the Gerber photoplotters (from Gerber Scientific Inc), used to make a monochromatic image of the PCB using tapes generated by geometric software.

However, the overall process continued to rely too much on mechanical work and manual translation of electronic information to the graphics. The file standard of the photoplotter was so popular that it became the name of the current industry standard for the digital description of PCB images: the Gerber file. It was only in the 1980s, after the publication of the Carven Mead and Lynn Conway book Introduction to VSLI Systems, that both companies and engineers started to integrated automated methods of IC design in the semiconductor industry, using programming languages for behavior and structural description of the circuit. This paradigm shift led to the current EDA foundations, which uses a programming language to describe a circuit and feeds this description to a software that automatically calculates the detailed physical design.

There are several advantages of using EDAs tools instead of manual processes. One of the most obvious one is the reduction of the development time of complex ICs, FPGA-based circuits and PCBs, by minimizing the laborious manual tasks from conceptualization to manufacturing. It also optimizes the manufacturing costs, by delivering the best board configuration and eliminating the possible schematic-to-PCB errors. Furthermore, EDA tools provides powerful simulation tools, such as SPICE-based circuit analysis and FEM-based electromagnetic evaluation, which significantly reduces the number of iterations necessary to develop a product.

EDA software also provides a unified framework for top-down design of complex systems with mixed-signal circuits, providing tools for both software and hardware components. However, precise and reliable EDA software is typically expensive, with complex proprietary programs that are often not user-friendly for a non-expert designer. Therefore, companies have to dedicate time and money to buy EDA licenses, install the resources, and train the design team to work with specific tools. These disadvantages are mitigated by open-source and open-license EDA tools, such as the KiCAD PCB editor and the Ngspice circuit simulator.

EDA for FGPA Developments

In this article, we will focus on the implementation of the Intel Quartus Prime, which is the tool used to develop and verify implementations in Intel/Altera FPGA models. However, there are several other tools in the market that are aimed at different lines of products, including Vivado (Xilinx), HDL Coder (Mathworks), EDA Playgroung (Doulos), and Cadence Design Systems. Regardless of the tool itself, the basis of all EDAs is to ensure that you have a complete solution in terms of designing, verifying, and integrating FPGAs into your product. In this section, we discuss some common uses of EDA software in FPGA-based systems.

The first feature of the Quartus software we are going to discuss is the Signal Tap Logic Analyzer. It consists of a system-level debugging program used to capture and analyze the signal behavior of an FPGA circuit. As seen in Figure 3, it is possible to evaluate the response of each internal signal without wasting I/O pins and without the need for any external debugger, all done through the good old JTAG interface. The captured data about the desired internal nodes is stored inside the device’s memory, readily available for user analysis during debugging. This tool can greatly simplify device testing and verification, by dismissing any major modifications in the design files and hardware. The GUI provides a visual framework to analyze the behavior of the internal nodes in sync with user-defined trigger conditions (Figure 3).

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Figure 3 • Signal Tap Logic Analyzer GUI.


The Platform Designer is another powerful EDA tool of the Intel package. It is able to automatically generate the interconnections of the FPGA systems and subsystems, which saves an immense amount of time that would be spent in manually routing the logic otherwise. It also provides a functional testbench to analyze the signal behavior and test the generated circuit. The Platform Designer framework can support both black box components and complex interconnected subsystems. It is also compatible with register transfer level (RTL) languages, schematic entries, and block-based design entries. The user-friendly GUI, the compliance with IP blocks, and the automatic testbench generation can significantly reduce the design time in industry applications, which also ultimately results in a cost reduction of the final product.

Timing analysis is also fundamental in FPGA design, especially in parallel signal processing applications (which is the case in SDRs). The Intel Quartus Prime provides the Timing Analyzer tool to capture, evaluate, and validate the timing performance of the FPGA implementation, using standard constraints of industry and proper reporting methods. Timing analysis uses the Verilog compiler and synthesizer, called Quartus Analysis & Synthesis. This tool can implement and optimize the FPGA implementation by using automatic mapping of logic elements and other device resources, as well as minimize the resource usage through logic synthesis. The Quartus Analysis & Synthesis also provides a unified framework for the project, generating a single database with all the design files.

EDA for PCB Design

There are several EDA tools for PCB design in the market, such as Altium, Eagle, Allegro, and KiCAD. Due to its open-source nature, we will focus on KiCAD. KiCAD is a complete EDA environment, with integrated schematic capture, PCB layout, SPICE simulation, 3D viewer, automatic generation of bill of materials (BOM) files, and engineering parameters calculation. It also offers management tools for footprints and symbol libraries. The schematic capture enables the creation of custom symbols and hierarchical subcircuits, that can be easily linked with SPICE simulation using ngspice.

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Figure 4 • Image of some sort of KiCAD GUI.

The netlist generated from the schematic is used by the electrical rules checking (ERC) tool, which ensures that the PCB layout matches the schematic. The schematic symbols can be coupled with different footprints, which improves the flexibility of the design process. In terms of layout, KiCAD offers some advanced functionalities, such as differential and single-ended length tuning, automatic routing, layer dimming, and personalized design rule checking (DRC) tools. Furthermore, external tools and plugins can be added to the EDA, including BOM and assembly viewers, panelization, and generation of high-quality silkscreen labels. KiCost is an interesting external tool, that can be run as a script to generate cost-related spreadsheets by automatically searching for part prices on the websites of known distributors, facilitating greater efficiency.

One of the most important features of the KiCAD EDA is the design rule checking (DRC) tool. The DRC is a generalized checker that verifies if the PCB layout complies with the parameter specifications of the electrical schematic, the mechanical requirements, and the physical specifications of the intended manufacturing process. During key steps of the PCB design process, the designer should run the DRC tool, which will then analyze the geometric files, the netlist, and the design rules to point out any mismatches between schematic and layout, insufficient copper clearances, short circuits, and open nodes.

The KiCAD can also be used to view and check the Gerber files designed in the EDA or to review Gerbers from third parties, using several available Gerber inspection tools. The Gerber file can be directly opened using KiCAD to measure clearances, check spacing, circuit elements, and fiducial, and be further edited by creating a KiCAD project using nothing but the Gerber itself. Furthermore, KiCAD can import designs from other EAD tools, including Altium, Eagle, and FabMaster.

Finally, the open-source nature of KiCAD enables constant updates and upgrades from the development team, which ensures quick bug correction and even allows specific feature requests from users. Moreover, the user-friendly environment combined with the free license significantly reduces the costs for installation and training, so many companies are migrating from proprietary EDAs to KiCAD.


Although SDRs revolutionized the RF world, new developments and upgrades are still necessary to keep up with the technological advancements of their applications. In this sense, EDA tools play a major role in the industry, eliminating the manual work and optimizing the performance in the design flow of both the SDR’s RFE and digital backend. PCB EDA tools, such as KiCAD, are fundamental in the development of the many boards of the RFE, providing schematic designers, PCB layout editors, simulators, and other manufacturing tools. In particular, KiCAD offers a high-quality EDA performance for free, which is extremely advantageous in an industry that is known for its expensive licenses.
At the digital backend side, FPGA EDAs are fundamental to develop the interconnected logic of the SDR. High-end FPGA designing tools, such as the Intel Quartus Prime, are the perfect frameworks to design and optimize the complex logic circuits necessary in the digital backend, providing features such as Verilog compilation and synthesis, system integration tools, timing analyzers, and logic analyzers. Regardless of the application intended, EDA tools are mandatory in any modern SDR design.

About the Author

2022 06 SDRs 05Brendon McHugh is a field application engineer and technical writer at Per Vices. He is responsible for assisting current and prospective clients in configuring the right SDR solutions for their unique needs. He holds a degree in theoretical and mathematical physics from the University of Toronto. Per Vices has extensive experience in designing, developing, building and integrating high performance SDRs in many RF applications, including military & defense, wireless networks, low latency and medical devices. Contact today to see how we can help you with your SDR needs.

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